PXIe-6672
图4-28显示了GPCTR0\U门信号的定时要求。图4-28：。GPCTR0\U门信号定时GPCTR0\U输出信号此信号仅作为GPCTR0\U输出引脚上的输出可用。GPCTR0\U OUT信号反映通用计数器0的端子计数（TC）。您有两个软件可选输出选项：TC上的脉冲和TC上的切换输出极性。输出极性可由软件为两个选项选择。该输出在启动时设置为高阻抗。图4-29显示了GPCTR0\U输出的定时。图4-29：。GPCTR0\U OUT信号定时GPCTR0\U UP\U DOWN信号此信号可在DIO6引脚上进行外部输入，但不能作为输入/输出连接器的输出。当该引脚处于逻辑低位时，通用计数器0向下计数，当其处于逻辑高位时，计数器向上计数。您可以禁用此输入，以便软件控制上下功能，并使DIO6引脚不受限制以供一般使用。上升沿极性下降沿极性t w t w=10 ns小GPCTR0\U源GPCTR0\U OUT GPCTR0\U OUT（在TC上切换输出）（在TC上脉冲）TC第4章连接信号©National Instruments Corporation 4-33 NI PCI-6110/6111用户手册GPCTR1\U源信号任何PFI引脚都可以从外部输入GPCTR1\U源信号，该信号可作为PFI3/GPCTR1\U源引脚的输出。作为输入，GPCTR1\U源配置为边缘检测模式。您可以选择任何PFI引脚作为GPCTR1\U源的源，并为上升沿或下降沿配置极性选择。作为输出，GPCTR1\U源监视连接到通用计数器1的实际时钟，即使源时钟是由另一个PFI外部生成的。该输出在启动时设置为三态。图4-30显示了GPCTR1\U源的定时要求。图4-30：。GPCTR1\U源信号定时大允许频率为20 MHz，小脉冲宽度为10 ns高或低。没有低频率限制。除非您选择一些外部源，否则20 MHz或100 kHz时基通常会生成GPCTR1\U源。GPCTR1\U门信号任何PFI引脚都可以从外部输入GPCTR1\U门信号，该信号可作为PFI4/GPCTR1\U门引脚的输出。作为输入，GPCTR1\U门配置为边缘检测模式。您可以选择任何PFI引脚作为GPCTR1\U门的源，并配置上升沿或下降沿的极性选择。您可以在各种不同的应用程序中使用门信号来执行诸如启动和停止计数器、生成中断、保存计数器内容等操作。

Figure 4-28 shows the timing requirements for the GPCTR0_GATE signal. Figure 4-28. GPCTR0_GATE Signal Timing GPCTR0_OUT Signal This signal is available only as an output on the GPCTR0_OUT pin. The GPCTR0_OUT signal reflects the terminal count (TC) of general-purpose counter 0. You have two software-selectable output options—pulse on TC and toggle output polarity on TC. The output polarity is software-selectable for both options. This output is set to high-impedance at startup. Figure 4-29 shows the timing of GPCTR0_OUT. Figure 4-29. GPCTR0_OUT Signal Timing GPCTR0_UP_DOWN Signal This signal can be externally input on the DIO6 pin and is not available as an output on the I/O connector. The general-purpose counter 0 counts down when this pin is at a logic low and counts up when it is at a logic high. You can disable this input so that software controls the up-down functionality and leaves the DIO6 pin free for general use. Rising-edge polarity Falling-edge polarity t w t w = 10 ns minimum GPCTR0_SOURCE GPCTR0_OUT GPCTR0_OUT (Toggle output on TC) (Pulse on TC) TC Chapter 4 Connecting Signals © National Instruments Corporation 4-33 NI PCI-6110/6111 User Manual GPCTR1_SOURCE Signal Any PFI pin can externally input the GPCTR1_SOURCE signal, which is available as an output on the PFI3/GPCTR1_SOURCE pin. As an input, GPCTR1_SOURCE is configured in the edge-detection mode. You can select any PFI pin as the source for GPCTR1_SOURCE and configure the polarity selection for either rising or falling edge. As an output, GPCTR1_SOURCE monitors the actual clock connected to general-purpose counter 1, even if the source clock is being externally generated by another PFI. This output is set to tri-state at startup. Figure 4-30 shows the timing requirements for GPCTR1_SOURCE. Figure 4-30. GPCTR1_SOURCE Signal Timing The maximum allowed frequency is 20 MHz, with a minimum pulse width of 10 ns high or low. There is no minimum frequency limitation. The 20 MHz or 100 kHz timebase normally generates the GPCTR1_SOURCE unless you select some external source. GPCTR1_GATE Signal Any PFI pin can externally input the GPCTR1_GATE signal, which is available as an output on the PFI4/GPCTR1_GATE pin. As an input, GPCTR1_GATE is configured in edge-detection mode. You can select any PFI pin as the source for GPCTR1_GATE and configure the polarity selection for either rising or falling edge. You can use the gate signal in a variety of different applications to perform such actions as starting and stopping the counter, generating interrupts, saving the counter contents, and so on.