MVME712A/AM
MVME从VMEbus背板连接器P1和P2获取电源。
P2还用于32位传输中的高16位数据，以及
扩展寻址模式下的8条地址行。MVME可能无法工作
主板未连接到VMEbus背板连接器时正确
P1和P2。
无论MVME是作为VMEbus主设备还是作为VMEbus从设备运行，它
配置为32位地址和32位数据（A32/D32）。然而
在第3章所示的地址范围内处理A16或A24设备。D8级
系统中的和/或D16设备必须由MC68040处理/
MC68LC040软件。请参阅第3章中的内存映射。
MVME包含共享板载DRAM，其基址为
软件可选。车载处理器和非车载VMEbus
设备在基本物理地址$00000000处看到此本地DRAM，如下所示
由MVMEBug固件编程。可通过以下方式进行更改
软件到任何其他基址。参见MVME嵌入式控制器
更多信息，请参阅程序员参考指南。
如果MVME尝试访问不存在位置的非车载资源，并且
不是系统控制器，如果系统没有全局总线超时，
MVME永远等待VMEbus循环完成。这将导致
要锁定的系统。只有一种情况下，系统可能
缺少此全局总线超时：当MVME不是系统控制器时
系统中其他地方没有全局总线超时。
可以在单个VME机箱中安装多个MVME。一般来说
支持硬件多处理器功能。
注意：如果要在MVME945中安装多个MVME
机箱，请勿在插槽12中安装MVME。高度
IP模块可能会导致该插槽中的间隙困难
位置
VMEbus上的其他MPU可以中断、禁用、通信和
确定处理器的运行状态。GCSR的一个寄存器
（全局控制/状态寄存器）集合包括四个用作位置的位
监视器允许一个MVME处理器向任何其他处理器广播信号
MVME处理器。所有八个寄存器都可以从任何本地
处理器以及来自VMEbus的

The MVME draws power from VMEbus backplane connectors P1 and P2. P2 is also used for the upper 16 bits of data in 32-bit transfers, and for the upper 8 address lines in extended addressing mode. The MVME may not function properly without its main board connected to VMEbus backplane connectors P1 and P2. Whether the MVME operates as a VMEbus master or as a VMEbus slave, it is configured for 32 bits of address and 32 bits of data (A32/D32). However, it handles A16 or A24 devices in the address ranges indicated in Chapter 3. D8 and/or D16 devices in the system must be handled by the MC68040/ MC68LC040 software. Refer to the memory maps in Chapter 3. The MVME contains shared onboard DRAM whose base address is software-selectable. Both the onboard processor and offboard VMEbus devices see this local DRAM at base physical address $00000000, as programmed by the MVMEBug firmware. This may be changed via software to any other base address. Refer to the MVME Embedded Controller Programmer’s Reference Guide for more information. If the MVME tries to access offboard resources in a nonexistent location and is not system controller, and if the system does not have a global bus timeout, the MVME waits forever for the VMEbus cycle to complete. This will cause the system to lock up. There is only one situation in which the system might lack this global bus timeout: when the MVME is not the system controller and there is no global bus timeout elsewhere in the system. Multiple MVMEs may be installed in a single VME chassis. In general, hardware multiprocessor features are supported. Note If you are installing multiple MVMEs in an MVME945 chassis, do not install an MVME in slot 12. The height of the IP modules may cause clearance difficulties in that slot position. Other MPUs on the VMEbus can interrupt, disable, communicate with, and determine the operational status of the processor(s). One register of the GCSR (global control/status register) set includes four bits that function as location monitors to allow one MVME processor to broadcast a signal to any other MVME processors. All eight registers are accessible from any local processor as well as from the VMEbus